Create hardware with FPGAs, Linux and Python (Project Miniconf)

Presented by TimVideos.us HDMI2USB.tv Project and Enjoy Digital, Jim Mussared
Tuesday 10:15 a.m.–5:30 p.m. in Large POD Room CB11.04.400
Target audience: Developer

Abstract

In 2005 the Love-Rusty 3000 was a state of the art crypto accelerator. Developed by the infamous Robert Love & Rusty Russell, it was the talk of Linux.conf.au 2005. Many intrepid kernel hackers spent much of the conference developing a Linux driver for the advanced feature set[1]. Sadly in 2018 the hardware is no longer available, the innovative & advanced feature set can no longer inspire new Engineers. This doesn't have to be the end thanks to the development of low cost and accessible FPGA hardware. You **can** help resurrect this jewel of a device to inspire the next generation! What was old is new again! The [Migen tooling developed by M-Labs](https://m-labs.hk/gateware.html) when extended by [EnjoyDigital's litex ecosystem](http://www.enjoy-digital.fr/) enables creation of "System on Chip" (SoCs) that can run Linux. Using a Python based HDL[2] combined with open CPUs[3] cores, the complete source code available under open source licenses. This technology has been used in everything from custom mobile phone base stations, [quantum mechanics physics experiments](https://m-labs.hk/artiq/index.html) and is even the basis for the [TimVideos HDMI2USB project](https://hdmi2usb.tv) which is currently being used to record Linux.conf.au! During the day we will take you through the following; * Creating your own SoC using Python based Migen and litex. * Running your SoC on an FPGA and booting into Linux. * Creating a peripheral providing the Love-Rusty 3000 feature set and adding to your SoC. * Controlling your new peripheral from Linux. This will all be done without ever directly touching a single line of Verilog or VHDL. No experience in either of these languages is required! While this tutorials aims to be as accessible as possible, only so much can be covered in a day. For this reason attendees are required to; * Have strong programming experience. Python and C will be in heavy use. * Have compiled and customized their own Linux kernel. *(Experience with Linux Kernel development is a definite plus!)* * Must do the prework at http://XXXXX before the tutorial. *(Anyone who hasn't done the pre-work will be asked to leave.)* * Understanding of how a CPU operates. *(Understanding what CSR registers and "memory mapped IO" are a plus.)* This tutorial requires hardware to complete, you must have the following; * An FPGA development board on the list at http://XXXX -- A number of loaner boards are available, contact mithro@mithis.com * You **must** have a fast, modern, laptop running Ubuntu 14.04 LTS or a version later than 16.04 Linux in a VM on Mac OS X can be problematic. [1]: https://linux.org.au/conf/2005/abstractb2b1.html?id=296 [2]: Hardware description language [3]: Like any of Pico RISC V, OpenRISC 1K, LatticeMicro32 or J2 open processor.

Presented by

TimVideos.us HDMI2USB.tv Project and Enjoy Digital

# TimVideos.us HDMI2USB.tv - https://hdmi2usb.tv The TimVideos.us HDMI2USB.tv project develops affordable hardware options to record and stream HD videos (from HDMI & DisplayPort sources) for conferences, meetings and user groups. The HDMI2USB.tv project started in 2013, and is an active ongoing project in its third iteration of hardware prototyping. It has been used to record numerous FOSS conference around the world, including Linux.conf.au, many PyCons around the world (PyCon AU, pyOhio, Kiwi PyCon & PyCon ZA), and DebConf! Find out more at https://hdmi2usb.tv ---- # Enjoy Digital - http://enjoy-digital.fr/ With over 8 years of experience in FPGA design, Enjoy Digital provides FPGA and software design services for embedded systems. Since 2011 we have worked on video, software defined radio, avionics designs and even labs experiments for physics institutes. Enjoy Digital always try to find the best (and simplest) solution, and have acquired on strong expertise on various interfaces: PCIe, SATA, SDRAM (SDR to DDR3), Ethernet, HDMI, SFP, CPRI, SRIO... We also love open-source hardware and try to share my designs when possible which has resulted in the Lite series of open source cores. These include; * LiteX - A soft fork of the M-Labs MiSoC+Migen technologies which adds support for more architectures and keeps compatibility with older designs. * LiteDRAM - A completely FOSS, small footprint and configurable SDRAM core supporting SDRAM, DDR, DDR-2, DDR-3 and LPDDR on Spartan-6, Artix-7, Kintex-7 and ultrascale parts! A free, portable and flexible alternative to vendor's solutions! * LiteEth - A small footprint and configurable Ethernet core include Etherbone wishbone bridge and tftp firmware booting support. * LitePCIe - A small footprint and configurable PCIe core support including auto generation of Linux driver support. * LiteScope - A small footprint and configurable embedded logic analyzer for your FPGA design. * LiteJESD204B - A small footprint and configurable core for interfacing with high speed data capture ADCs. * LiteSATA - A small footprint and configurable SATA gen1/2/3 core. * LiteICLink - Small footprint and configurable Inter-Chip communication core * and even more!

Jim Mussared

Jim works at Grok Learning, an Australian startup that is looking to revolutionise how programming is taught in schools. He’s taught embedded programming to high school students for the last five years through the NCSS Summer School and Python programming through the NCSS Challenge. In his spare time, he loves sailing and working on electronics projects.